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Standard Backplane Product List

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PICMG 2.16 R1.0 Standard Backplane

PICMG 2.16 R1.0 Standard Backplane

PICMG 2.16 R1.0 Standard Backplane

This is a 7U, 7-slot CPCI/PSB bus backplane compliant with the PICMG2.16 R1.0 specification. Pl and P2 are designed according to the 64-bit bus wiring specifications of the PICMG2.0 R3.0 standard, with a single-ended impedance (Zo) set to 65Ω ±10%. P3 is configured for dual fabric board support (NodeLink a, b) with Ethernet bus wiring specifications, and the differential impedance (Zdiff) is set to 100Ω ±10%.

  • Embedded Board Computers

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PICMG 2.20 R1.0 standard backplane

PICMG 2.20 R1.0 standard backplane

PICMG 2.20 R1.0 Standard Backplane

The PICMG 2.20 standard (Serial Mesh Bus) adds a serial mesh fabric with full mesh bus connections to the CPCI platform, providing a bus standard that supports data communication between various protocols. The P4 area employs a ZD connector (high-speed differential connector), enabling a transfer rate of 2.5 Gbps through strict differential impedance control of the backplane and the SERDES drivers specified as fabric interfaces between module boards. The backplane is configured with 11 slots (CPCI bus), and the serial mesh bus (P4) supports 8 slots (slots 4 to 11) with 8 channels × 2 ports (Smaller Replicated Mesh specification).

  • Embedded Board Computers

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